BCD to 7 Segment LED Display Decoder Circuit

A display decoder is used to convert a BCD or a binary code into a 7 segment code used to operate a 7 segment LED display. It generally has 4 input lines and 7 output lines. Here we design a simple display decoder circuit using logic gates. Even though commercial BCD to 7 segment decoders are available, designing a display decoder using logic gates may prove to be beneficial from economical as well as knowledge point of view.

Principle Behind Display Decoder Circuit:

The basic idea involves driving a common cathode 7-segment LED display using combinational logic circuit.  The logic circuit is designed with 4 inputs and 7 outputs, each representing an input to the display IC. Using Karnough’s map, logic circuitry for each input to the display is designed.

Theory Behind the Circuit:

The first and foremost aspect of this circuit is decoder. A decoder is a combinational circuit which is used to convert a binary or BCD (Binary Coded Decimal) number to the corresponding decimal number. It can be a simple binary to decimal decoder or a BCD to 7 segment decoder.

Another relevant section is the combinational logic circuitry. A combinational logic circuit is a system of logic gates consisting of only outputs and inputs. The output of a combinational logic circuit depends only on the present state of the inputs and nothing else. Best examples of such circuits are Encoders and Decoders, Multiplexers and De-multiplexers, Adders, Subtractors etc.

To understand the design and operation of these logic circuits, one needs to have a good knowledge about Boolean algebra and logic gates. For example few basic Boolean algebra rules to be followed are the complementary law, associative law, De-Morgan’s law etc. The De-Morgan’s law states how ‘AND’ of two NOTs can be converted to a single NOR. In other words, (NOT A) AND (NOT B) can be changed to A NOR B.

A 7 segment LED display consists of an arrangement of 8 LEDs such that either all the anodes are common or cathodes are common.  A common cathode 7 segment display consists of 8 pins – 7 input pins labeled from ‘a’ to ‘g’ and 8^th pin as common ground pin.

Practically BCD to 7 segment decoders are available in form of integrated circuits such as 74LS47.  Apart from regular 4 input pins and 7 output pins, it consists of a lamping test pin used for segment testing, ripple blanking input pin used to blank off zeros in multiple display systems, ripple blanking output pin used for cascading purposes and a blanking input pin.

Circuit Diagram of BCD to Seven Segment LED Display Decoder:

BCD to 7 Segment Display Decoder Circuit Diagram 

Display Decoder Circuit Components:

• IC 7405 – Hex Inverters (NOT gates)
• Two IC 7408 (Quad AND gates)
• Three IC 7432 (Quad OR gates)
• IC 7402 (Quad NOR gate)
• 4 DPST switches
• Common cathode 7- segment LED display
• 5 V Battery

7 Segment Display Decoder Circuit Design:

Step 1: The first step of the design involves analysis of the common cathode 7-segment display.  A 7-segment display consists of an arrangement of LEDs in an ‘H’ form.  A truth table is constructed with the combination of inputs for each decimal number. For example, decimal number 1 would command a combination of b and c (refer the diagram given below).

7 Segment LED

Image Resource Link: www.thelearningpit.com

Step 2: The second step involves constructing the truth table listing the 7 display input signals, decimal number and corresponding 4 digit binary numbers.  Given below is the truth table:

Inputs				In Decimal	Outputs
A	B	C	D		a	b	c	d	e	f	g
0	0	0	0	0	1	1	1	1	1	1	0
0	0	0	1	1	0	1	1	0	0	0	0
0	0	1	0	2	1	1	0	1	1	0	1
0	0	1	1	3	1	1	1	1	0	0	1
0	1	0	0	4	0	0	1	0	0	1	1
0	1	0	1	5	1	0	1	1	0	1	1
0	1	1	0	6	0	0	1	1	1	1	1
0	1	1	1	7	1	1	1	0	0	0	0
1	0	0	0	8	1	1	1	1	1	1	1
1	0	0	1	9	1	1	1	1	0	1	1

Step 3: The third step involves constructing the Karnough’s map for each output term and then simplifying them to obtain a logic combination of inputs for each output. After significant mapping and simplification, each output signal can be summarized below

• a =   (A OR C) OR (B AND C) OR (B NOR D).
• b = (NOT B) OR (C NOR D) OR (C AND D).
• c = B OR D OR (NOT C)
• d = (B NOR D) OR (C AND (B NAND D)) OR (B AND D AND (NOT C)) OR A
• e = (B NOR D) OR (C AND (NOT D))
• f = A OR (C NOR D) OR (B AND (C NAND D))
• g = A OR (B AND (NOT C)) OR (C AND (B NAND D))

Step 4: The final step involves drawing a combinational logic circuit for each output signal. Once the task was accomplished, a combinational logic circuit was drawn on Multisim using 4 switches as inputs and a 7- segment display as output.

Display Decoder Circuit Operation:

The circuit operation can be understood through the truth table itself. When all the switches are connected such that each input is grounded, the output of the combinational logic circuit would be so as to drive all the output LEDs except ‘g’ to conduction.  Thus the number 0 will be displayed. Similar operation would take place for all other combinations of the input switches.

Applications of Display Decoder Circuit:

1. This circuit can be modified using timers and counters to display the number of clock pulses.
2. This circuit can be modified to develop an alphabet display system instead of a decimal number display system.
3. It can be used as a timer circuit.

Limitations of Display Decoder Circuit:

1. This circuit involves lot of logic gates and is quite complex.
2. Timing delay by each logic gate is a matter of concern and this circuit might not produce accurate results when used to display count of pulses.
3. This is a theoretical circuit and may require few modifications.
4. source:http://www.electronicshub.org